For years, the semiconductor industry asked one question about silicon carbide:
Can SiC become a serious alternative to silicon in high-power electronics?
That question has largely been answered.
Silicon carbide MOSFETs are already used in electric vehicles, charging infrastructure, renewable energy systems, industrial power supplies and other high-voltage applications. The material has moved far beyond the experimental stage and into commercial semiconductor manufacturing.
A much more difficult question is now emerging:
Can silicon carbide follow the same wafer-scaling path that transformed the silicon industry?
The industry has already moved from 100 mm and 150 mm SiC wafers toward 200 mm manufacturing. But in 2025 and 2026, another technological frontier began to appear: 300 mm, or 12-inch, silicon carbide wafers.
SICC has publicly demonstrated a portfolio of 300 mm SiC substrates. Coherent has announced its own 300 mm SiC capability. In January 2026, Wolfspeed announced that it had successfully produced a single-crystal 300 mm SiC wafer and described the achievement as a pathway toward future volume commercialization.
This does not mean that 300 mm SiC has already replaced 200 mm production.
It means something more important.
The next SiC manufacturing race has started.
And this time the competition is not only about electric vehicles.
It is about power electronics, AI infrastructure, advanced packaging, photonics and the future economics of wide-bandgap semiconductors.
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Silicon dominated the semiconductor industry because it combined acceptable electrical properties with an extraordinary manufacturing ecosystem.
For logic and memory, silicon remains extremely difficult to challenge.
Power electronics are different.
When voltage, temperature and power density increase, the fundamental physical properties of the semiconductor material begin to matter much more.
Silicon has a bandgap of approximately 1.12 eV, while 4H-SiC has a bandgap of roughly 3.26 eV.
Silicon carbide also offers a substantially higher critical electric field and better thermal conductivity.
These characteristics allow SiC power devices to operate at high voltage with thinner drift layers, lower resistance and potentially lower switching and conduction losses.
That combination is particularly valuable in applications such as:
The industry is therefore moving beyond the question of whether SiC has advantages.
The new competition is about manufacturing those advantages at lower cost.
And wafer diameter is becoming one of the most important parts of that equation.
The logic behind larger wafers is simple.
A 300 mm wafer provides more than twice the surface area of a 200 mm wafer. In principle, that means significantly more chips can be produced during a single wafer-processing cycle.
Lithography, implantation, deposition, etching, metrology and other fab operations are expensive.
If more devices can be processed on each wafer, the manufacturing cost per device can eventually decline—provided that yield remains sufficiently high.
Silicon learned this lesson decades ago.
The transition from smaller silicon wafers to 200 mm and eventually 300 mm helped create the enormous manufacturing scale behind modern CMOS production.
SiC manufacturers would like to capture some of the same economic benefits.
But there is a problem.
Making a larger silicon carbide wafer is dramatically more difficult than making a larger silicon wafer.
That is why the transition matters so much.
A 300 mm SiC wafer is impressive to display at a semiconductor exhibition.
Commercial manufacturing requires much more.
The wafer needs to maintain acceptable performance across almost 300 millimeters of crystal diameter.
That means controlling:
crystal defects, stress distribution, resistivity uniformity, thickness variation, bow, warp, crystallographic orientation, surface roughness, subsurface damage and edge quality.
This begins before the wafer even exists.
Bulk 4H-SiC is typically grown using physical vapor transport.
Inside a graphite growth environment operating at temperatures above 2,000°C, source SiC material sublimates and is transported toward a seed crystal.
Unlike silicon, SiC cannot simply be melted and pulled using conventional large-scale silicon crystal-growth methods.
Controlling a large SiC crystal therefore depends heavily on thermal-field engineering.
As crystal diameter increases, radial temperature gradients become increasingly difficult to manage.
Thermal stress can affect crystal quality.
Defects generated during crystal growth can propagate through the boule and eventually appear inside finished substrates.
The difficulty does not disappear after growth.
SiC is extremely hard.
Slicing, grinding, lapping and polishing larger wafers while maintaining tight geometry specifications creates another manufacturing challenge.
In May 2026, published research reported 300 mm 4H-SiC substrates with encouraging defect and geometry results, demonstrating that the technical barrier is being pushed forward. At the same time, industry commentary still describes 300 mm SiC as a recently demonstrated technology rather than an established high-volume standard.
This distinction is essential.
A manufacturer does not win the 300 mm race simply by producing one large wafer.
It wins by producing thousands of them consistently.
The semiconductor industry often confuses technological demonstration with industrial maturity.
That should be avoided with SiC.
As of 2026, 200 mm remains the critical production platform for the next stage of SiC power semiconductor expansion.
Wolfspeed's latest generation of SiC MOSFETs, announced in June 2026, is still based on its qualified and ramp-ready 200 mm manufacturing platform.
Infineon has also made major investments in large-scale 200 mm SiC production.
This tells us where commercial manufacturing is today.
But announcements from SICC, Coherent and Wolfspeed tell us where the industry wants to go next.
The correct way to understand the current transition is therefore:
150 mm created today's SiC market.
200 mm is industrializing it.
300 mm could redefine its long-term cost structure.
That is a much bigger story than simply increasing wafer diameter.
One of the most important developments in the 300 mm transition is China's participation.
Chinese SiC companies are no longer competing only in conventional 150 mm substrates.
SICC publicly presented 300 mm conductive SiC substrates before expanding its displayed portfolio to include multiple 300 mm substrate categories at SEMICON China 2025.
That is strategically significant.
For years, one possible assumption was that Western SiC manufacturers could preserve their technological advantage by moving faster toward larger diameters.
The emergence of Chinese 300 mm development weakens that assumption.
Future competition may therefore occur simultaneously at several levels:
crystal growth technology, defect control, wafer processing, epitaxy, power-device fabrication and manufacturing cost.
China also possesses a rapidly expanding domestic ecosystem for crystal-growth furnaces, graphite components, wafer processing and semiconductor equipment.
This does not automatically mean that Chinese suppliers will dominate 300 mm SiC.
It means the technological race is likely to be highly competitive from the beginning.
Wolfspeed's recent 300 mm strategy also reveals an important change in how the industry thinks about SiC.
Traditionally, most discussion focused on power devices.
Electric vehicles were the flagship application.
But 300 mm SiC could create opportunities outside conventional MOSFET manufacturing.
In March 2026, Wolfspeed described its 300 mm SiC platform as a potential material foundation for next-generation AI and high-performance computing packaging, including large heterogeneous integration structures. The company specifically highlighted thermal, mechanical and electrical challenges associated with increasing AI package size and power density.
That could become an entirely different SiC market.
Instead of using SiC only as the semiconductor underneath a power MOSFET, manufacturers may eventually use large-diameter SiC as part of the physical infrastructure surrounding advanced computing devices.
Its high thermal conductivity and mechanical properties make it interesting for environments where removing heat from extremely large and powerful packages becomes increasingly difficult.
This matters because AI hardware is creating power and thermal problems that transistor scaling alone cannot solve.
The semiconductor industry may therefore discover that SiC has value not only in converting electricity before it reaches the processor, but also in managing the physical environment around the processor itself.
Electric vehicles created the first large commercial wave for silicon carbide.
AI data centers could create a second.
The amount of electrical power required by AI computing systems is rising rapidly.
Higher rack densities mean more powerful conversion stages, more cooling infrastructure and greater pressure to reduce energy losses.
Every fraction of efficiency matters when power consumption is measured in megawatts.
This creates opportunities for SiC across multiple layers of data-center infrastructure:
grid connection, medium-voltage conversion, backup power, energy storage, solid-state transformers and high-efficiency power supplies.
At the same time, advanced AI accelerators are pushing packaging technology toward larger interposers and more complex heterogeneous integration.
That is why the emergence of 300 mm SiC is particularly interesting.
The technology could potentially participate in both sides of the AI infrastructure problem:
delivering electricity efficiently and managing increasingly difficult thermal loads.
Coherent has also connected its 300 mm SiC development to the thermal requirements of AI data centers, demonstrating that the industry is beginning to view large-diameter SiC as more than an automotive power-device story.
A wafer transition affects far more than substrate manufacturers.
Moving to 300 mm can eventually require changes throughout the production ecosystem.
Crystal-growth systems must accommodate larger boules.
Wafer slicing and grinding equipment must handle larger substrates.
CMP processes must maintain extremely tight surface specifications across greater areas.
Metrology systems must inspect larger wafers.
Epitaxial reactors must maintain thickness and doping uniformity across 300 mm.
Device fabs must establish compatible process flows.
Automation, wafer handling and carrier systems may also change.
This creates a new industrial opportunity.
The companies that benefit from the 300 mm transition may not only be SiC wafer suppliers.
Equipment manufacturers, graphite suppliers, polishing-material producers, epitaxy companies, metrology specialists and advanced packaging companies could all become part of the next SiC investment cycle.
For semiconductor supply-chain planners, this is an important lesson.
The transition to 300 mm is an ecosystem transition, not simply a substrate upgrade.
No.
Larger wafers reduce cost only when the manufacturing process is sufficiently mature.
Consider a simple example.
A 300 mm wafer provides far more usable area than a 200 mm wafer.
But if crystal defects increase substantially toward the edge, if epitaxial uniformity deteriorates or if wafer breakage rises, much of the theoretical cost advantage disappears.
The real economic equation is therefore not:
larger wafer = cheaper device.
It is:
larger wafer + acceptable yield + high equipment utilization = cheaper device.
That is exactly why 300 mm SiC could take years to reach true high-volume maturity.
The companies that master yield first will have an enormous advantage.
The rise of gallium nitride has created another misunderstanding.
GaN and SiC are sometimes described as direct competitors in a winner-takes-all battle.
The market is more complicated.
GaN offers exceptional switching performance and is becoming increasingly important in high-frequency applications, particularly at lower and medium voltages.
SiC becomes particularly attractive as voltage and power requirements increase.
EV traction systems, renewable-energy infrastructure, industrial power conversion and medium-voltage systems often play directly to SiC's strengths.
The likely future is therefore not Si versus SiC versus GaN.
It is specialization.
Silicon will remain enormous.
GaN will capture applications where frequency and integration provide major advantages.
SiC will continue expanding where voltage, thermal performance and power density become dominant engineering requirements.
The semiconductor age is moving away from one universal material platform and toward a multi-material architecture.
The first generation of SiC competition was about crystal quality.
The second was about automotive qualification.
The third was about expanding 150 mm and 200 mm capacity.
The next phase could be defined by 300 mm manufacturing.
But the winners will not necessarily be the companies that announce 300 mm wafers first.
They will be the companies that solve five problems simultaneously:
large-diameter crystal growth
low defect density
wafer geometry control
high device yield
competitive cost per die
That combination is extremely difficult.
And that difficulty is exactly why 300 mm matters strategically.
If it were easy, it would not create a competitive advantage.
There is an important difference between saying that the 300 mm SiC era has begun and saying that 300 mm SiC is already the industry standard.
The latter would be premature.
The former is increasingly difficult to deny.
Multiple suppliers have now demonstrated or announced 300 mm capabilities. Research is showing improved large-diameter crystal quality. Companies are discussing applications extending from power electronics into AI infrastructure, advanced packaging and photonics.
Meanwhile, 200 mm production continues to scale.
This means the industry is operating on two timelines simultaneously.
On the commercial timeline, manufacturers must make 200 mm SiC profitable.
On the technological timeline, they must prepare for 300 mm.
The tension between those two objectives could define the next several years of silicon carbide investment.
The most significant change in the SiC industry is therefore not simply that wafers are becoming larger.
It is that silicon carbide is evolving from a specialty semiconductor material into a strategic industrial platform.
The same material can participate in electric transportation, renewable energy, industrial electrification, grid modernization, AI power infrastructure, advanced packaging and potentially next-generation optical systems.
That changes the nature of the competition.
The race is no longer just about who sells more SiC wafers.
It is about who controls crystal growth, wafer scaling, processing technology, equipment, upstream materials and downstream applications.
For decades, silicon benefited from an enormous manufacturing ecosystem that competitors could not easily reproduce.
Silicon carbide is now beginning to build its own.
And the move from 200 mm toward 300 mm may represent the moment when that ecosystem enters a completely different stage of maturity.
Silicon will not disappear.
Nor will SiC replace it across the semiconductor industry.
But in the places where electricity must be converted efficiently, enormous heat loads must be controlled and power density continues to rise, silicon is no longer the only material that defines technological progress.
The next frontier is no longer simply whether silicon carbide can challenge silicon.
It is whether the industry can manufacture SiC at 300 mm with the quality, yield and cost structure required for a new generation of power electronics and computing infrastructure.
That race has only just begun.
For years, the semiconductor industry asked one question about silicon carbide:
Can SiC become a serious alternative to silicon in high-power electronics?
That question has largely been answered.
Silicon carbide MOSFETs are already used in electric vehicles, charging infrastructure, renewable energy systems, industrial power supplies and other high-voltage applications. The material has moved far beyond the experimental stage and into commercial semiconductor manufacturing.
A much more difficult question is now emerging:
Can silicon carbide follow the same wafer-scaling path that transformed the silicon industry?
The industry has already moved from 100 mm and 150 mm SiC wafers toward 200 mm manufacturing. But in 2025 and 2026, another technological frontier began to appear: 300 mm, or 12-inch, silicon carbide wafers.
SICC has publicly demonstrated a portfolio of 300 mm SiC substrates. Coherent has announced its own 300 mm SiC capability. In January 2026, Wolfspeed announced that it had successfully produced a single-crystal 300 mm SiC wafer and described the achievement as a pathway toward future volume commercialization.
This does not mean that 300 mm SiC has already replaced 200 mm production.
It means something more important.
The next SiC manufacturing race has started.
And this time the competition is not only about electric vehicles.
It is about power electronics, AI infrastructure, advanced packaging, photonics and the future economics of wide-bandgap semiconductors.
![]()
Silicon dominated the semiconductor industry because it combined acceptable electrical properties with an extraordinary manufacturing ecosystem.
For logic and memory, silicon remains extremely difficult to challenge.
Power electronics are different.
When voltage, temperature and power density increase, the fundamental physical properties of the semiconductor material begin to matter much more.
Silicon has a bandgap of approximately 1.12 eV, while 4H-SiC has a bandgap of roughly 3.26 eV.
Silicon carbide also offers a substantially higher critical electric field and better thermal conductivity.
These characteristics allow SiC power devices to operate at high voltage with thinner drift layers, lower resistance and potentially lower switching and conduction losses.
That combination is particularly valuable in applications such as:
The industry is therefore moving beyond the question of whether SiC has advantages.
The new competition is about manufacturing those advantages at lower cost.
And wafer diameter is becoming one of the most important parts of that equation.
The logic behind larger wafers is simple.
A 300 mm wafer provides more than twice the surface area of a 200 mm wafer. In principle, that means significantly more chips can be produced during a single wafer-processing cycle.
Lithography, implantation, deposition, etching, metrology and other fab operations are expensive.
If more devices can be processed on each wafer, the manufacturing cost per device can eventually decline—provided that yield remains sufficiently high.
Silicon learned this lesson decades ago.
The transition from smaller silicon wafers to 200 mm and eventually 300 mm helped create the enormous manufacturing scale behind modern CMOS production.
SiC manufacturers would like to capture some of the same economic benefits.
But there is a problem.
Making a larger silicon carbide wafer is dramatically more difficult than making a larger silicon wafer.
That is why the transition matters so much.
A 300 mm SiC wafer is impressive to display at a semiconductor exhibition.
Commercial manufacturing requires much more.
The wafer needs to maintain acceptable performance across almost 300 millimeters of crystal diameter.
That means controlling:
crystal defects, stress distribution, resistivity uniformity, thickness variation, bow, warp, crystallographic orientation, surface roughness, subsurface damage and edge quality.
This begins before the wafer even exists.
Bulk 4H-SiC is typically grown using physical vapor transport.
Inside a graphite growth environment operating at temperatures above 2,000°C, source SiC material sublimates and is transported toward a seed crystal.
Unlike silicon, SiC cannot simply be melted and pulled using conventional large-scale silicon crystal-growth methods.
Controlling a large SiC crystal therefore depends heavily on thermal-field engineering.
As crystal diameter increases, radial temperature gradients become increasingly difficult to manage.
Thermal stress can affect crystal quality.
Defects generated during crystal growth can propagate through the boule and eventually appear inside finished substrates.
The difficulty does not disappear after growth.
SiC is extremely hard.
Slicing, grinding, lapping and polishing larger wafers while maintaining tight geometry specifications creates another manufacturing challenge.
In May 2026, published research reported 300 mm 4H-SiC substrates with encouraging defect and geometry results, demonstrating that the technical barrier is being pushed forward. At the same time, industry commentary still describes 300 mm SiC as a recently demonstrated technology rather than an established high-volume standard.
This distinction is essential.
A manufacturer does not win the 300 mm race simply by producing one large wafer.
It wins by producing thousands of them consistently.
The semiconductor industry often confuses technological demonstration with industrial maturity.
That should be avoided with SiC.
As of 2026, 200 mm remains the critical production platform for the next stage of SiC power semiconductor expansion.
Wolfspeed's latest generation of SiC MOSFETs, announced in June 2026, is still based on its qualified and ramp-ready 200 mm manufacturing platform.
Infineon has also made major investments in large-scale 200 mm SiC production.
This tells us where commercial manufacturing is today.
But announcements from SICC, Coherent and Wolfspeed tell us where the industry wants to go next.
The correct way to understand the current transition is therefore:
150 mm created today's SiC market.
200 mm is industrializing it.
300 mm could redefine its long-term cost structure.
That is a much bigger story than simply increasing wafer diameter.
One of the most important developments in the 300 mm transition is China's participation.
Chinese SiC companies are no longer competing only in conventional 150 mm substrates.
SICC publicly presented 300 mm conductive SiC substrates before expanding its displayed portfolio to include multiple 300 mm substrate categories at SEMICON China 2025.
That is strategically significant.
For years, one possible assumption was that Western SiC manufacturers could preserve their technological advantage by moving faster toward larger diameters.
The emergence of Chinese 300 mm development weakens that assumption.
Future competition may therefore occur simultaneously at several levels:
crystal growth technology, defect control, wafer processing, epitaxy, power-device fabrication and manufacturing cost.
China also possesses a rapidly expanding domestic ecosystem for crystal-growth furnaces, graphite components, wafer processing and semiconductor equipment.
This does not automatically mean that Chinese suppliers will dominate 300 mm SiC.
It means the technological race is likely to be highly competitive from the beginning.
Wolfspeed's recent 300 mm strategy also reveals an important change in how the industry thinks about SiC.
Traditionally, most discussion focused on power devices.
Electric vehicles were the flagship application.
But 300 mm SiC could create opportunities outside conventional MOSFET manufacturing.
In March 2026, Wolfspeed described its 300 mm SiC platform as a potential material foundation for next-generation AI and high-performance computing packaging, including large heterogeneous integration structures. The company specifically highlighted thermal, mechanical and electrical challenges associated with increasing AI package size and power density.
That could become an entirely different SiC market.
Instead of using SiC only as the semiconductor underneath a power MOSFET, manufacturers may eventually use large-diameter SiC as part of the physical infrastructure surrounding advanced computing devices.
Its high thermal conductivity and mechanical properties make it interesting for environments where removing heat from extremely large and powerful packages becomes increasingly difficult.
This matters because AI hardware is creating power and thermal problems that transistor scaling alone cannot solve.
The semiconductor industry may therefore discover that SiC has value not only in converting electricity before it reaches the processor, but also in managing the physical environment around the processor itself.
Electric vehicles created the first large commercial wave for silicon carbide.
AI data centers could create a second.
The amount of electrical power required by AI computing systems is rising rapidly.
Higher rack densities mean more powerful conversion stages, more cooling infrastructure and greater pressure to reduce energy losses.
Every fraction of efficiency matters when power consumption is measured in megawatts.
This creates opportunities for SiC across multiple layers of data-center infrastructure:
grid connection, medium-voltage conversion, backup power, energy storage, solid-state transformers and high-efficiency power supplies.
At the same time, advanced AI accelerators are pushing packaging technology toward larger interposers and more complex heterogeneous integration.
That is why the emergence of 300 mm SiC is particularly interesting.
The technology could potentially participate in both sides of the AI infrastructure problem:
delivering electricity efficiently and managing increasingly difficult thermal loads.
Coherent has also connected its 300 mm SiC development to the thermal requirements of AI data centers, demonstrating that the industry is beginning to view large-diameter SiC as more than an automotive power-device story.
A wafer transition affects far more than substrate manufacturers.
Moving to 300 mm can eventually require changes throughout the production ecosystem.
Crystal-growth systems must accommodate larger boules.
Wafer slicing and grinding equipment must handle larger substrates.
CMP processes must maintain extremely tight surface specifications across greater areas.
Metrology systems must inspect larger wafers.
Epitaxial reactors must maintain thickness and doping uniformity across 300 mm.
Device fabs must establish compatible process flows.
Automation, wafer handling and carrier systems may also change.
This creates a new industrial opportunity.
The companies that benefit from the 300 mm transition may not only be SiC wafer suppliers.
Equipment manufacturers, graphite suppliers, polishing-material producers, epitaxy companies, metrology specialists and advanced packaging companies could all become part of the next SiC investment cycle.
For semiconductor supply-chain planners, this is an important lesson.
The transition to 300 mm is an ecosystem transition, not simply a substrate upgrade.
No.
Larger wafers reduce cost only when the manufacturing process is sufficiently mature.
Consider a simple example.
A 300 mm wafer provides far more usable area than a 200 mm wafer.
But if crystal defects increase substantially toward the edge, if epitaxial uniformity deteriorates or if wafer breakage rises, much of the theoretical cost advantage disappears.
The real economic equation is therefore not:
larger wafer = cheaper device.
It is:
larger wafer + acceptable yield + high equipment utilization = cheaper device.
That is exactly why 300 mm SiC could take years to reach true high-volume maturity.
The companies that master yield first will have an enormous advantage.
The rise of gallium nitride has created another misunderstanding.
GaN and SiC are sometimes described as direct competitors in a winner-takes-all battle.
The market is more complicated.
GaN offers exceptional switching performance and is becoming increasingly important in high-frequency applications, particularly at lower and medium voltages.
SiC becomes particularly attractive as voltage and power requirements increase.
EV traction systems, renewable-energy infrastructure, industrial power conversion and medium-voltage systems often play directly to SiC's strengths.
The likely future is therefore not Si versus SiC versus GaN.
It is specialization.
Silicon will remain enormous.
GaN will capture applications where frequency and integration provide major advantages.
SiC will continue expanding where voltage, thermal performance and power density become dominant engineering requirements.
The semiconductor age is moving away from one universal material platform and toward a multi-material architecture.
The first generation of SiC competition was about crystal quality.
The second was about automotive qualification.
The third was about expanding 150 mm and 200 mm capacity.
The next phase could be defined by 300 mm manufacturing.
But the winners will not necessarily be the companies that announce 300 mm wafers first.
They will be the companies that solve five problems simultaneously:
large-diameter crystal growth
low defect density
wafer geometry control
high device yield
competitive cost per die
That combination is extremely difficult.
And that difficulty is exactly why 300 mm matters strategically.
If it were easy, it would not create a competitive advantage.
There is an important difference between saying that the 300 mm SiC era has begun and saying that 300 mm SiC is already the industry standard.
The latter would be premature.
The former is increasingly difficult to deny.
Multiple suppliers have now demonstrated or announced 300 mm capabilities. Research is showing improved large-diameter crystal quality. Companies are discussing applications extending from power electronics into AI infrastructure, advanced packaging and photonics.
Meanwhile, 200 mm production continues to scale.
This means the industry is operating on two timelines simultaneously.
On the commercial timeline, manufacturers must make 200 mm SiC profitable.
On the technological timeline, they must prepare for 300 mm.
The tension between those two objectives could define the next several years of silicon carbide investment.
The most significant change in the SiC industry is therefore not simply that wafers are becoming larger.
It is that silicon carbide is evolving from a specialty semiconductor material into a strategic industrial platform.
The same material can participate in electric transportation, renewable energy, industrial electrification, grid modernization, AI power infrastructure, advanced packaging and potentially next-generation optical systems.
That changes the nature of the competition.
The race is no longer just about who sells more SiC wafers.
It is about who controls crystal growth, wafer scaling, processing technology, equipment, upstream materials and downstream applications.
For decades, silicon benefited from an enormous manufacturing ecosystem that competitors could not easily reproduce.
Silicon carbide is now beginning to build its own.
And the move from 200 mm toward 300 mm may represent the moment when that ecosystem enters a completely different stage of maturity.
Silicon will not disappear.
Nor will SiC replace it across the semiconductor industry.
But in the places where electricity must be converted efficiently, enormous heat loads must be controlled and power density continues to rise, silicon is no longer the only material that defines technological progress.
The next frontier is no longer simply whether silicon carbide can challenge silicon.
It is whether the industry can manufacture SiC at 300 mm with the quality, yield and cost structure required for a new generation of power electronics and computing infrastructure.
That race has only just begun.