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SiC Substrate
Created with Pixso. Premium 3C-SiC Substrates: N-Type Production Grade Wafers for 5G & Power Electronics

Premium 3C-SiC Substrates: N-Type Production Grade Wafers for 5G & Power Electronics

Brand Name: ZMSH
Model Number: 3C-N SiC
MOQ: 10pc
Price: by case
Delivery Time: in 30days
Payment Terms: T/T
Detail Information
Place of Origin:
CHINA
Certification:
rohs
Size:
2inch,4inch,6inch,5×5,10×10
Dielectric Constant:
9.7
Surface Hardness:
HV0.3>2500
Density:
3.21 G/cm3
Thermal Expansion Coefficient:
4.5 X 10-6/K
Breakdown Voltage:
5.5 MV/cm
Applications:
Communications, Radar Systems
Packaging Details:
customzied plastic box
Supply Ability:
1000pc/month
Product Description

Premium 3C-SiC Substrates: N-Type Production Grade Wafers for 5G & Power Electronics

Pioneering Third-Generation Semiconductor Solutions

Premium 3C-SiC Substrates: N-Type Production Grade Wafers for 5G & Power Electronics 0

Fig 1. High-Purity 3C-SiC Semiconductor Wafer

With over a decade of dedicated expertise, ZMSH stands at the forefront of advanced material R&D. We deliver highly customized semiconductor substrates—including SiC, Silicon, Sapphire, and SOI wafers. Our silicon carbide portfolio comprehensively covers 4H, 6H, and 3C polytypes, offering scalable supply chains from 2-inch research samples to 12-inch mass-production wafers.

Built for Extreme Performance:
Our N-type 3C-SiC substrates are meticulously engineered for next-generation high-frequency power components and automotive EV inverters. They dramatically outperform traditional silicon by offering extraordinary thermal stability (up to 1,600°C) and superior thermal conductivity (49 W/m·K). Manufactured to rigorous aerospace-grade international standards, these wafers guarantee unwavering reliability in the most demanding operational environments.

Substrate Core Features

1. Versatile Dimensional Scalability:
  • Standard Formats: Available in 2", 4", 6", and 8" diameters.
  • Bespoke Geometry: Custom sizing starts from 5×5 mm to client-specific layouts.
2. Ultra-Low Defect Architecture:
  • Microvoid densities are strictly maintained below 0.1 cm-2.
  • Exceptional resistivity control ensures maximum device yield and reliability.
3. Seamless Process Compatibility:
  • Optimized for intense fabrication steps like high-temperature oxidation and lithography.
  • Superior surface flatness achieved at λ/10 @632.8 nm.

Detailed Technical Specifications

Grade Zero MPD Production Grade (Z Grade) Standard Production Grade (P Grade) Dummy Grade (D Grade)
Diameter 145.5 mm – 150.0 mm
Thickness 350 μm ± 25 μm
Wafer Orientation Off axis: 2.0°–4.0° toward [1120] ± 0.5° for 4H/6H-P, On axis: <111> ± 0.5° for 3C-N
** Micropipe Density 0 cm-2
** Resistivity p-type 4H/6H-P ≤ 0.1 Ω·cm ≤ 0.3 Ω·cm
n-type 3C-N ≤ 0.8 mΩ·cm ≤ 1 mΩ·cm
Primary Flat Orientation 4H/6H-P {1010} ± 5.0°
3C-N {110} ± 5.0°
Primary Flat Length 32.5 mm ± 2.0 mm
Secondary Flat Length 18.0 mm ± 2.0 mm
Secondary Flat Orientation Silicon face up, 90° CW. from Prime flat ± 5.0°
Edge Exclusion 3 mm 6 mm
LTV / TIV / Bow / Warp ≤ 2.5 μm / ≤ 5 μm / ≤ 15 μm / ≤ 30 μm ≤ 10 μm / ≤ 15 μm / ≤ 25 μm / ≤ 40 μm
* Roughness Polish Ra ≤ 1 nm
CMP Ra ≤ 0.2 nm Ra ≤ 0.5 nm
Edge Cracks By High Intensity Light None Cum. length ≤ 10 mm, single ≤ 2 mm
* Hex Plates By High Intensity Light Cumulative area ≤ 0.05% Cumulative area ≤ 0.1%
* Polytype Areas By High Intensity Light None Cumulative area ≤ 3%
Visual Carbon Inclusions None Cumulative area ≤ 0.05%
# Silicon Surface Scratches By High Intensity Light None Cumulative length ≤ 1 × wafer diameter
Edge Chips High By Intensity Light None permitted ≥ 0.2mm width and depth 5 allowed, ≤ 1 mm each
Silicon Surface Contamination By High Intensity None
Packaging Multi-wafer Cassette or Single Wafer Container

Primary Application Scenarios

1. High-Frequency RF & 5G Communications

Vital as RF device substrates for 5G Base Stations, allowing efficient mmWave signal propagation. Crucial for Advanced Radar Systems where low attenuation ensures precision targeting.

2. Electric Mobility (EVs)

Revolutionizes On-Board Chargers (OBC) by cutting energy losses by 40% in 800V architectures. Upgrades DC/DC Converters to reduce energy waste by up to 90%, significantly boosting vehicle range.

3C-SiC Substrates FAQ

Q1: What exactly is a 3C-SiC substrate?

A: 3C-SiC refers to cubic silicon carbide. It is a highly specialized semiconductor material characterized by a cubic crystalline structure. It delivers phenomenal electron mobility (1,100 cm2/V·s) and robust thermal conductivity (49 W/m·K).

Search Tags: #SiliconCarbideSubstrate #3C_N_Type_SIC #SemiconductorMaterials #3C_SiC_Substrate #ProductionGrade #5G_Communications #EV_Inverters